Microcontroller
Enabling the next generation of microcontrollers with innovative Network-on-Chip technology for efficiency, scalability, and safety.
Overview
Overview
As System-on-Chip (SoC) designs grow more complex, traditional buses and crossbars are being replaced by advanced Network-on-Chip (NoC) interconnect solutions. This transformation addresses the increasing demands for power efficiency, scalability, and integration in modern microcontroller (MCU) architectures. NoC technology, pioneered by Arteris Inc., leverages packet-based data transfer methods, offering significant advantages in power consumption, performance, and die area utilization compared to conventional interconnect methods.
Arteris’ comprehensive NoC solutions—FlexNoC, FlexWay, CodaCache, and Magillem—are designed to meet the challenges of modern MCU designs. These technologies provide enhanced power efficiency, streamlined interconnect and memory architectures, and simplified design workflows. This is particularly relevant for MCUs powering IoT devices, automotive applications, and industrial systems that demand low power, high reliability, and advanced features like AI and cybersecurity.
Advantages
Advantages
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Optimized PPA
FlexGen, FlexNoC and FlexWay interconnect solutions enhance power, performance, and area efficiency, enabling advanced MCUs for IoT and industrial applications. Both can be paired with CodaCache which further improves memory access and bandwidth, vital for AI/ML tasks in high-performance MCUs.
Safety
Using Arteris System IP, developers achieve ISO 26262-compliant design, verification, and documentation of safety-critical automotive systems and create ISO 26262-compliant Networks-on-Chip.
Simplified SoC Integration
Magillem tools automate SoC design workflows, supporting IP-XACT standards for faster development cycles and improved collaboration.
Partners
Partners
Arteris collaborates with leading semiconductor vendors and IoT solution providers to deliver optimized interconnect IP solutions for modern MCUs.









Standards
Standards
From a system design perspective, Arteris supports AMBA protocols, ISO 26262, and other standards for functional safety and interoperability.
Arteris already works with partners like Arm by implementing the latest AMBA standards and with Synopsys, Cadence, Alphawave, Blue Cheetah Analog, Innosilicon, and others to align on NoC to Controller/PHY interfaces.
Non-coherent interconnect solutions for entry-level MCUs and IoT innovations
The cost-effective interconnect for entry-level MCUs, ideal for IoT and consumer electronics. FlexWay also works well with CodaCache, the Integrated last-level cache controller for optimized memory performance in AI-driven tasks.

Products
Products
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- Magillem Registers – Automate the Hardware/Software Interface for Fast Chip Design
- Accelerating Timing Closure for Networks-on-Chip (NoCs) using Physical Awareness
- Optimizing Data Transport Architectures in RISC–V SoCs for AI/ML Applications
- FlexGen Product Tour
- Integration Challenges for RISC-V Designs
- Promises and Pitfalls of SoC Restructuring
- Scaling Performance in AI Systems
- Architecting the Future of Deep Learning Presentation
- Arm & Arteris AI and ISO 26262 Presentation
- Arm TechCon: Implementing ISO 26262 Compliant AI Systems-on-Chip with Arm and Arteris
- Automating the Generation of Scalable and Reusable FMEDA in Complex Systems-on-Chip (SoCs)
- Building Better IP with RTL Architect NoC IP Physical Exploration
- Challenges Adopting Fault Injection to Support Safety Analysis in Complex SoCs
- Efficient Scaling of AI Accelerators Using NoC Tiling
- FMEDA Automation for Scalability and Reuse in Complex Systems on Chips (SoCs)
- Fundamentals of ISO 26262 Part 11 for Semiconductors
- Implementing Low-Power AI SoCs Using NoC Interconnect Technology
- Implementing Machine Learning & Neural Network Chip Architectures
- Is the Missing Safety Ingredient in Automotive AI Traceability?
- ISO 26262 System-on-Chip (SoC) Safety Analysis for ADAS and AV
- ISO 26262: FMEA before FMEDA
- ISO 26262: What to Expect From Your Chip or IP Provider
- Lessons Learned Integrating AI/ML Accelerators into Complex ISO 26262 Compliant Systems-on-Chip
- Routing Congestion: The Growing Cost of Wires
- Safety Considerations for Network-on-Chip (NoC) Development
- The Role of Networks-on-Chips Enabling AI/ML Silicon and Systems
- Tiled Approach to System Scaling
- Using Synopsys Z01X to Accelerate the Fault Injection Campaign of a Fully Configurable IP
- EE Journal: Managing the Massive Data Throughput: AI-Based Designs and The Value of NoC Tiling
- Electronic Design: All About NoCs
- SemiWiki: The Impact of Arteris on Automotive and Beyond with Frank Schirrmeister
- SemiWiki: A Broad View of Design Architectures and the Role of the NoC with Arteris’ Michal Siwinski
- EE Journal: The Freedom to Innovate: Arteris and the Rise of RISC-V
- EE Journal: The Network-on-Chip Pioneer: How Arteris Enabling SoC Developers to Create Physically Valid NoCs Faster
- SemiWiki: The Impact of Using a Physically Aware NoC with Charlie Janac
- A Configurable Test Infrastructure using a Mixed-Language and Mixed-Level IP Integration IP-XACT Flow
- A Design Flow for Critical Embedded Systems
- A SystemC Extension for Enabling Tighter Integration of IP-XACT Platforms with Virtual Prototypes
- AMS System-Level Verification and Validation using UVM in SystemC and SystemC-AMS: Automotive Use Cases
- Optimizing Enterprise-Class SSD Host Controller Design with Arteris FlexNoC Network-On-Chip Interconnect IP
- Power Dissipation of the Network-on-Chip in a System-on-Chip for MPEG-4 Video Encoding
- Re-Architecting SoCs for the AI Era
- Routing Congestion: The Growing Cost of Wires
- Scalability – A Looming Problem in Safety Analysis
- Security in Artificial Intelligence
- Using Machine Learning for Characterizations of NoC Components
- Using Synopsys Z01X to Accelerate the Fault Injection Campaign of a Fully Configurable IP
- Using Virtual Prototypes to Improve the Traceability of Critical Embedded Systems Flow
- Boost SoC Efficiency and Speed with FlexGen Smart NoC IP Automation White Paper
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